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24C512 EEPROM DIP
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24C512 EEPROM DIP
5.0 (VCC 2.7 (VCC 1.8 (VCC to 3.6V) Internally Organized 8 2-wire Serial Interface Schmitt Triggers, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 1 MHz (5V), 400 kHz (2.7V) and 100 kHz (1.8V) Compatibility Write Protect Pin for Hardware and Software Data Protection 128-byte Page Write Mode (Partial Page Writes Allowed) Self-timed Write Cycle (5 ms Typical) High Reliability Endurance: 100,000 Write Cycles Data Retention: 40 Years ESD Protection: >4000V Automotive Grade and Extended Temperature Devices Available 8-pin PDIP and 20-pin JEDEC SOIC, 8-pin LAP, and 8-ball dBGATM Packages
The AT24C512 provides 524,288 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device's cascadable feature allows to 4 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-pin PDIP, 20-pin JEDEC SOIC, 8-pin Leadless Array (LAP), and 8-ball dBGA packages. In addition, the entire family is available to 5.5V) and to 3.6V) versions.
Pin Name - A1 SDA SCL WP NC Function Address Inputs Serial Data Serial Clock Input Write Protect No Connect 20-pin SOIC
Operating Temperature.................................. to +125°C Storage Temperature..................................... to +150°C Voltage on Any Pin with Respect to +7.0V Maximum Operating Voltage.......................................... 6.25V DC Output Current........................................................ 5.0 mA *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open collector devices. DEVICE/PAGE ADDRESSES (A1, A0): The A1 and A0 pins are device address inputs that are hardwired or left not connected for hardware compatibility with AT24C128/256. When the pins are hardwired, as many as four 512K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). When the pins are not hardwired, the default A1 and A0 are zero. 2
WRITE PROTECT (WP): The write protect input, when tied to GND, allows normal write operations. When WP is tied high to VCC, all write operations to the memory are inhibited. If left unconnected, WP is internally pulled down to GND. Switching WP to VCC prior to a write operation creates a software write protect function.
AT24C512, 512K SERIAL EEPROM: The 512K is internally organized as 512 pages of 128-bytes each. Random word addressing requires a 16-bit data word address.
Applicable over recommended operating range from = 1.0 MHz, VCC = +1.8V.
Symbol CI/O CIN Note: Test Condition Input/Output Capacitance (SDA) Input Capacitance (A0, A1, SCL) 1. This parameter is characterized and is not 100% tested. Max 8 6 Units pF Conditions VI/O = 0V VIN = 0V
Applicable over recommended operating range from: TAI to +85°C, VCC to +5.5V, TAC to +70°C, VCC to +5.5V (unless otherwise noted).
Symbol ICC2 ISB1 Parameter Supply Voltage Supply Voltage Supply Voltage Supply Current Supply Current Standby Current (1.8V option) Standby Current (2.7V option) Standby Current (5.0V option) Input Leakage Current Output Leakage Current Input Low Level(1) Input High Level
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